A 1.0 V, 5.4 pJ/bit GFSK demodulator based on an injection locked ring oscillator for low-IF receivers

  • Soonyoung Hong
  • , Arup K. George
  • , Donggu Im
  • , Minkyu Je
  • , Junghyup Lee*
  • *Corresponding author for this work

Research output: Contribution to journalJournal articlepeer-review

Abstract

This paper presents an ultra-low power, low cost demodulator for gaussian frequency shift keying (GFSK) receivers that use low intermediate frequencies (IF). The demodulator employs a direct IF to digital data conversion scheme by using an injection-locked ring oscillator (ILRO) with a 1-bit flip-flop. It consumes 2.7 µW from a 1.0 V supply at a data rate of 500 kbps achieving an energy efficiency of 5.4 pJ/bit which is 30 times better than that of the recently presented works. The demodulator also achieves 17.5 dB SNR at 0.1 % BER while operating at the same date rate. The demodulator is implemented in a 0.18 µm standard CMOS process and occupies an active area of 0.012

Original languageEnglish
Article number9218935
Pages (from-to)185209-185217
Number of pages9
JournalIEEE Access
Volume8
DOIs
StatePublished - 2020

Keywords

  • CMOS
  • Demodulator
  • GFSK
  • Injection locked ring oscillator
  • Low power
  • Low-IF

Quacquarelli Symonds(QS) Subject Topics

  • Materials Science
  • Computer Science & Information Systems

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