TY - GEN
T1 - A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1-2 MASH structure
AU - Oh, Sein
AU - Oh, Younggyun
AU - Lee, Juyoung
AU - Kim, Kihyun
AU - Lee, Seungjun
AU - Kim, Jintae
AU - Chae, Hyungil
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/3
Y1 - 2020/3
N2 - A pipelined NS-SAR ADC with 1-2 MASH structure is presented. Two-stage pipelined structure consisting of 5-bit NS-SAR and 4-bit NS-SAR ADCs shows 3rd-order noise-shaping. To maximize power efficiency, a single operational transconductance amplifier (OTA) is reused for both an integrator for noise shaping and a residue amplifier for pipelining. The measured DR is 80dB when the sampling rate is 83.3MS/s and bandwidth is 6MHz, and power consumption is 3.5mW showing FoMs,DR of 172.3dB. The proposed ADC structure greatly relaxes design requirement of each SAR quantizer, and can achieve high resolution and wide bandwidth with good power efficiency.
AB - A pipelined NS-SAR ADC with 1-2 MASH structure is presented. Two-stage pipelined structure consisting of 5-bit NS-SAR and 4-bit NS-SAR ADCs shows 3rd-order noise-shaping. To maximize power efficiency, a single operational transconductance amplifier (OTA) is reused for both an integrator for noise shaping and a residue amplifier for pipelining. The measured DR is 80dB when the sampling rate is 83.3MS/s and bandwidth is 6MHz, and power consumption is 3.5mW showing FoMs,DR of 172.3dB. The proposed ADC structure greatly relaxes design requirement of each SAR quantizer, and can achieve high resolution and wide bandwidth with good power efficiency.
KW - multi-stage noise-shaping (MASH)
KW - Noise-shaping SAR ADC
KW - pipelined SAR ADC
KW - ΔΣ ADC
UR - https://www.scopus.com/pages/publications/85084499649
U2 - 10.1109/CICC48029.2020.9075929
DO - 10.1109/CICC48029.2020.9075929
M3 - Conference paper
AN - SCOPUS:85084499649
T3 - Proceedings of the Custom Integrated Circuits Conference
BT - 2020 IEEE Custom Integrated Circuits Conference, CICC 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 IEEE Custom Integrated Circuits Conference, CICC 2020
Y2 - 22 March 2020 through 25 March 2020
ER -