TY - GEN
T1 - A scalable and modular approach to verification of ATM switching system using reverse specification
AU - Chung, Chang Shin
AU - Lee, Moon Kun
AU - Jeong, Myung Sun
N1 - Publisher Copyright:
© 1998 IEEE.
PY - 1998
Y1 - 1998
N2 - This paper presents a methodology to verify very large and complex real-time software, such as ATM switching system. Due to the size and complexity, it is commonly very hard to understand and then verify the software. To overcome this problem, the methodology provides a scalable and modular approach to software understanding and verification. Firstly, an architecture of the software is constructed. The basic building block of the architecture is a Software Unit (SWU) which is hierarchically organized in the architecture. It guides understanding of the structural, functional, and behavioral views of the software at different abstraction levels. Secondly, there is a behavioral representation in the Real-time State Machine for Reverse Specification (RSMRS). RSMRS is constructed from SWU using reverse specification. RSMRS is further simulated and the simulation output is analyzed for verification. One of the most powerful characteristics of this approach is the capability of abstracting and exploding and verification information.
AB - This paper presents a methodology to verify very large and complex real-time software, such as ATM switching system. Due to the size and complexity, it is commonly very hard to understand and then verify the software. To overcome this problem, the methodology provides a scalable and modular approach to software understanding and verification. Firstly, an architecture of the software is constructed. The basic building block of the architecture is a Software Unit (SWU) which is hierarchically organized in the architecture. It guides understanding of the structural, functional, and behavioral views of the software at different abstraction levels. Secondly, there is a behavioral representation in the Real-time State Machine for Reverse Specification (RSMRS). RSMRS is constructed from SWU using reverse specification. RSMRS is further simulated and the simulation output is analyzed for verification. One of the most powerful characteristics of this approach is the capability of abstracting and exploding and verification information.
KW - Real-time System
KW - Reverse Specification
KW - Software Understanding
KW - Verification.
UR - https://www.scopus.com/pages/publications/85051925686
U2 - 10.1109/APSEC.1998.733730
DO - 10.1109/APSEC.1998.733730
M3 - Conference paper
AN - SCOPUS:85051925686
T3 - Proceedings - 1998 Asia Pacific Software Engineering Conference, APSEC 1998
SP - 278
EP - 285
BT - Proceedings - 1998 Asia Pacific Software Engineering Conference, APSEC 1998
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1998 Asia Pacific Software Engineering Conference, APSEC 1998
Y2 - 2 December 1998 through 4 December 1998
ER -