Abstract
This paper presents an efficient power-factor correction (PFC) scheme for plasma display panels (PDPs) to reduce harmonic currents and power consumption. A high-efficiency interleaved boost converter is proposed, which can reduce the conduction losses and diode reverse-recovery problems in the continuous-conduction-mode operation. A zero-current switching (ZCS) condition is obtained to solve the reverse-recovery problems of the output diodes. In addition, a control strategy is suggested for the use of the proposed converter in a practical design. A high power factor can be achieved without sensing the input voltage. The analysis of the proposed converter and its design considerations are presented in detail. The experimental results based on a 600-W prototype are discussed to evaluate the proposed converter for a PFC circuit in a 50-in PDP power supply unit.
| Original language | English |
|---|---|
| Article number | 4356477 |
| Pages (from-to) | 70-80 |
| Number of pages | 11 |
| Journal | IEEE/OSA Journal of Display Technology |
| Volume | 4 |
| Issue number | 1 |
| DOIs | |
| State | Published - 2008.03 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- Boost converter
- Diode reverse-recovery
- Interleaving technique
- Plasma display panels (PDPs)
- Power-factor correction (PFC)
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