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Analysis of interface trap states at Schottky diode by using equivalent circuit modeling

  • Myungsim Jun*
  • , Moongyu Jang
  • , Yarkyeon Kim
  • , Cheljong Choi
  • , Taeyoub Kim
  • , Byungchul Park
  • , Seongjae Lee
  • *Corresponding author for this work
  • Electronics and Telecommunications Research Institute
  • Chungnam National University

Research output: Contribution to journalJournal articlepeer-review

Abstract

The authors have developed a new equivalent circuit model to analyze the charging dynamics of the interface states in Schottky barrier diodes at reverse bias condition. Trap density and the capture/emission times are extracted by incorporating the measured ac admittance of erbium silicide Schottky diode with the newly developed equivalent circuit model. The extracted trap density is 1.5× 1012 cm-2 eV-1 and the capture and emission transition times are 19 and 5.9 μs, respectively. Trap density decreases to 6.1× 109 cm-2 eV-1 after N2 annealing.

Original languageEnglish
Pages (from-to)82-85
Number of pages4
JournalJournal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
Volume25
Issue number1
DOIs
StatePublished - 2007

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