Architecture selection of a flexible DSP core using reconfigurable system software

Jong Yeol Lee; Dea Hyun Lee; Jong Sun Kim; Hyun Dhong Yoon; Chong Min Kyung; Kyu Ho Park; Yong Hoon Lee; Seung Ho Hwang

Architecture selection of a flexible DSP core using reconfigurable system software

Jong Yeol Lee^*
, Dea Hyun Lee
, Jong Sun Kim
, Hyun Dhong Yoon
, Chong Min Kyung
, Kyu Ho Park
, Yong Hoon Lee
, Seung Ho Hwang

^*Corresponding author for this work

Division of Electronic Engineering

Korea Advanced Institute of Science and Technology

Research output: Contribution to journal › Conference article › peer-review

Abstract

MetaCore is a flexible DSP core in that the architecture of MetaCore can be modified easily by changing the hardware parameters. To fully exploit the merits of a flexible core, the system software must be re-configurable when the target architecture changes. In this paper, we present a re-configurable system software for a flexible DSP core and the architecture selection procedure called `compile-simulate-refine' cycle using the re-configurable system software. The `compile-simulate-refine' cycle can make it possible to select the best architecture for a given application by exploring the possible candidate architectures in short time.

Original language	English
Pages (from-to)	37-40
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	6
State	Published - 1998
Event	Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA Duration: 1998.05.31 → 1998.06.3

Cite this

@article{f8c1c1bff5a34b3396e4cff234f8b139,

title = "Architecture selection of a flexible DSP core using reconfigurable system software",

abstract = "MetaCore is a flexible DSP core in that the architecture of MetaCore can be modified easily by changing the hardware parameters. To fully exploit the merits of a flexible core, the system software must be re-configurable when the target architecture changes. In this paper, we present a re-configurable system software for a flexible DSP core and the architecture selection procedure called `compile-simulate-refine' cycle using the re-configurable system software. The `compile-simulate-refine' cycle can make it possible to select the best architecture for a given application by exploring the possible candidate architectures in short time.",

author = "Lee, \{Jong Yeol\} and Lee, \{Dea Hyun\} and Kim, \{Jong Sun\} and Yoon, \{Hyun Dhong\} and Kyung, \{Chong Min\} and Park, \{Kyu Ho\} and Lee, \{Yong Hoon\} and Hwang, \{Seung Ho\}",

year = "1998",

language = "English",

volume = "6",

pages = "37--40",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

note = "Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) ; Conference date: 31-05-1998 Through 03-06-1998",

}

TY - JOUR

T1 - Architecture selection of a flexible DSP core using reconfigurable system software

AU - Lee, Jong Yeol

AU - Lee, Dea Hyun

AU - Kim, Jong Sun

AU - Yoon, Hyun Dhong

AU - Kyung, Chong Min

AU - Park, Kyu Ho

AU - Lee, Yong Hoon

AU - Hwang, Seung Ho

PY - 1998

Y1 - 1998

N2 - MetaCore is a flexible DSP core in that the architecture of MetaCore can be modified easily by changing the hardware parameters. To fully exploit the merits of a flexible core, the system software must be re-configurable when the target architecture changes. In this paper, we present a re-configurable system software for a flexible DSP core and the architecture selection procedure called `compile-simulate-refine' cycle using the re-configurable system software. The `compile-simulate-refine' cycle can make it possible to select the best architecture for a given application by exploring the possible candidate architectures in short time.

AB - MetaCore is a flexible DSP core in that the architecture of MetaCore can be modified easily by changing the hardware parameters. To fully exploit the merits of a flexible core, the system software must be re-configurable when the target architecture changes. In this paper, we present a re-configurable system software for a flexible DSP core and the architecture selection procedure called `compile-simulate-refine' cycle using the re-configurable system software. The `compile-simulate-refine' cycle can make it possible to select the best architecture for a given application by exploring the possible candidate architectures in short time.

UR - https://www.scopus.com/pages/publications/0031623463

M3 - Conference article

AN - SCOPUS:0031623463

SN - 0271-4310

VL - 6

SP - 37

EP - 40

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6)

Y2 - 31 May 1998 through 3 June 1998

ER -

Architecture selection of a flexible DSP core using reconfigurable system software

Abstract

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