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Design of CMOS composite transistors with improved operating region

  • Young Gyu Yu
  • , Seok Woo Choi
  • , Dong Yong Kim
  • , Kyu Tae Park
  • , Hong Jo Ahn
  • Jeonbuk National University
  • Korea Research Council for Industrial Science and Technology
  • Ohio State University

Research output: Contribution to journalJournal articlepeer-review

Abstract

In this paper, we propose two new CMOS composite transistors with an improved operating region by reducing a threshold voltage. The proposed composite transistor 1 and 2 employ a P-type folded composite transistor and an electronic zener. diode in order to decrease the threshold voltage, respectively. The simulation has been carried out using 0.25μm n-well process with 2.5V supply voltage.

Original languageEnglish
Pages (from-to)1034-1037
Number of pages4
JournalMidwest Symposium on Circuits and Systems
Volume3
DOIs
StatePublished - 2000

Quacquarelli Symonds(QS) Subject Topics

  • Materials Science
  • Engineering - Electrical & Electronic
  • Engineering - Petroleum

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