Design of low error fixed-width squarer

Research output: Contribution to conferenceConference paperpeer-review

Abstract

The paper presents a design method for a fixed-width squarer that receives a W-bit input and produces a W-bit squared product. To compensate efficiently for the quantization error, Booth encoder outputs (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulation, it is shown that the performance of the proposed method is pretty close to that of the rounding operation and much better than that of the truncation operation.

Original languageEnglish
Title of host publication2003 IEEE Workshop on Signal Processing Systems
Subtitle of host publicationDesign and Implementation, SIPS 2003
EditorsWonyong Sung, Myung Hoon Sunwoo
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages213-218
Number of pages6
ISBN (Electronic)0780377958
DOIs
StatePublished - 2003
Event2003 IEEE Workshop on Signal Processing Systems, SIPS 2003 - Seoul, Korea, Republic of
Duration: 2003.08.272003.08.29

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Volume2003-January
ISSN (Print)1520-6130

Conference

Conference2003 IEEE Workshop on Signal Processing Systems, SIPS 2003
Country/TerritoryKorea, Republic of
CitySeoul
Period03.08.2703.08.29

Keywords

  • Design methodology
  • Digital signal processing
  • Encoding
  • Equalizers
  • Error compensation
  • Error correction
  • Frequency domain analysis
  • Image coding
  • Pattern recognition
  • Vector quantization

Quacquarelli Symonds(QS) Subject Topics

  • Computer Science & Information Systems
  • Mathematics
  • Engineering - Electrical & Electronic
  • Engineering - Petroleum
  • Data Science

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