Efficient IFFT design using mapping method

  • In Gul Jang*
  • , Yong Eun Kim
  • , Yi Nan Xu
  • , Jin Gyun Chung
  • *Corresponding author for this work

Research output: Contribution to conferenceConference paperpeer-review

Abstract

FFT/IFFT processor is one of the key components in the implementation of OFDM systems such as WiBro, DAB and UWB systems. Most of the researches on the implementation of FFT processors have focused on reducing the complexities of multipliers, memory and control circuits. In this paper, to reduce the register size required for IFFT, we propose a new IFFT design method based on a mapping method. By simulations, it is shown that the proposed IFFT design method achieves more than 60% area reduction and much SQNR (Signal-to-Quantization Noise Ration) gain compared with previous IFFT designs.

Original languageEnglish
Title of host publicationProceedings of APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
Pages878-881
Number of pages4
DOIs
StatePublished - 2008
EventAPCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - Macao, China
Duration: 2008.11.302008.12.3

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

ConferenceAPCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems
Country/TerritoryChina
CityMacao
Period08.11.3008.12.3

Quacquarelli Symonds(QS) Subject Topics

  • Engineering - Electrical & Electronic
  • Engineering - Petroleum

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