@inproceedings{52dcc68c75244c7ea3714aa9299b37d1,
title = "Efficient successive cancellation decoder for polar codes based on frozen bits",
abstract = "Recently, polar codes have received much attention due to their simple structure and low decoding complexity. However, because of the long decoding latency, polar codes are still not suitable for real-time applications. In this paper, by the analysis of the position of frozen bits and the architecture of conventional SC decoder, we present an efficient SC decoder architecture. Using the proposed architecture, the decoding latency of a polar code with length N can be reduced from N-1 to N/2-1. Also, the proposed architecture can reduce the number of MPEs about 33\% compared with conventional SC decoder.",
keywords = "frozen bit, low area, low latency, polar code",
author = "Zheyan Piao and Kim, \{Yeon Jin\} and Chung, \{Jin Gyun\}",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 ; Conference date: 25-10-2016 Through 28-10-2016",
year = "2017",
month = jan,
day = "3",
doi = "10.1109/APCCAS.2016.7804059",
language = "English",
series = "2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "585--587",
booktitle = "2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016",
}