Electrical and structural properties of ge metal-oxide-semiconductor devices with Pt/HfO2 gate stacks

  • Chel Jong Choi*
  • , Kyu Sang Shin
  • , Myung Il Jeong
  • , S. V.Jagadeesh Chandra
  • *Corresponding author for this work

Research output: Contribution to conferenceConference paperpeer-review

Abstract

We investigated structural and electrical properties of Ge and Si metal oxide semiconductor (MOS) devices with Pt/HfO2 gate stacks. Post-metallization annealing in O2 ambient reduced the accumulation capacitance more significantly in Si devices than in Ge devices due to the increase in the thickness of a low-k interfacial layer in-between the HfO 2 film and Si substrate. Ge devices exhibited lower effective work function values for a Pt gate electrode than Si devices owing to the presence of a large number of positively-charged dipoles caused by strong Fermi level pinning at the Ge surface.

Original languageEnglish
Title of host publicationECTI-CON 2010 - The 2010 ECTI International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology
Pages970-972
Number of pages3
StatePublished - 2010
Event7th Annual International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, ECTI-CON 2010 - Chiang Mai, Thailand
Duration: 2010.05.192010.05.21

Publication series

NameECTI-CON 2010 - The 2010 ECTI International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology

Conference

Conference7th Annual International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, ECTI-CON 2010
Country/TerritoryThailand
CityChiang Mai
Period10.05.1910.05.21

Quacquarelli Symonds(QS) Subject Topics

  • Computer Science & Information Systems
  • Engineering - Electrical & Electronic
  • Engineering - Petroleum
  • Data Science

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