Electrical characteristics of ZrO2 gate dielectric deposited on ultrathin silicon capping layer for SiGe metal-oxide-semiconductor device applications

Sangmoo Choi; Sanghun Jeon; Hyunsang Hwang; Young J. Song; Jung Wook Lim; Kyu Hwan Shim; Kyung Wan Park

doi:10.1143/jjap.41.5129

Electrical characteristics of ZrO₂ gate dielectric deposited on ultrathin silicon capping layer for SiGe metal-oxide-semiconductor device applications

Sangmoo Choi^*
, Sanghun Jeon
, Hyunsang Hwang
, Young J. Song
, Jung Wook Lim
, Kyu Hwan Shim
, Kyung Wan Park

^*Corresponding author for this work

Department of Semiconductor Science and Technology

Gwangju Institute of Science and Technology
Electronics and Telecommunications Research Institute

Research output: Contribution to journal › Journal article › peer-review

2 Scopus citations

Abstract

The electrical characteristics of ZrO₂ were investigated relative to its use in SiGe metal-oxide-semiconductor (MOS) gate dielectric applications. Compared to ZrO₂ directly deposited on SiGe, ZrO₂, when deposited on a silicon capping layer shows a significant improvement in electrical characteristics such as low leakage current, negligible hysteresis, less fixed charge density and a lower interface state density (D_it) after low-temperature wet vapor annealing. The improvement in the electrical characteristics of ZrO₂, with a silicon capping layer can be attributed to the negligible Ge segregation and surface roughness at the interface. Based on an Auger electron spectroscopy (AES) depth profile of Ge, we were able to confirm that Ge is segregated at the interface.

Original language	English
Pages (from-to)	5129-5130
Number of pages	2
Journal	Japanese Journal of Applied Physics
Volume	41
Issue number	8
DOIs	https://doi.org/10.1143/jjap.41.5129
State	Published - 2002.08

Keywords

Ge segregation
SiGe
Silicon capping layer
Wet vapor annealing
ZrO

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title = "Electrical characteristics of ZrO2 gate dielectric deposited on ultrathin silicon capping layer for SiGe metal-oxide-semiconductor device applications",

abstract = "The electrical characteristics of ZrO2 were investigated relative to its use in SiGe metal-oxide-semiconductor (MOS) gate dielectric applications. Compared to ZrO2 directly deposited on SiGe, ZrO2, when deposited on a silicon capping layer shows a significant improvement in electrical characteristics such as low leakage current, negligible hysteresis, less fixed charge density and a lower interface state density (Dit) after low-temperature wet vapor annealing. The improvement in the electrical characteristics of ZrO2, with a silicon capping layer can be attributed to the negligible Ge segregation and surface roughness at the interface. Based on an Auger electron spectroscopy (AES) depth profile of Ge, we were able to confirm that Ge is segregated at the interface.",

keywords = "Ge segregation, SiGe, Silicon capping layer, Wet vapor annealing, ZrO",

author = "Sangmoo Choi and Sanghun Jeon and Hyunsang Hwang and Song, \{Young J.\} and Lim, \{Jung Wook\} and Shim, \{Kyu Hwan\} and Park, \{Kyung Wan\}",

year = "2002",

month = aug,

doi = "10.1143/jjap.41.5129",

language = "English",

volume = "41",

pages = "5129--5130",

journal = "Japanese Journal of Applied Physics",

issn = "0021-4922",

number = "8",

}

TY - JOUR

T1 - Electrical characteristics of ZrO2 gate dielectric deposited on ultrathin silicon capping layer for SiGe metal-oxide-semiconductor device applications

AU - Choi, Sangmoo

AU - Jeon, Sanghun

AU - Hwang, Hyunsang

AU - Song, Young J.

AU - Lim, Jung Wook

AU - Shim, Kyu Hwan

AU - Park, Kyung Wan

PY - 2002/8

Y1 - 2002/8

N2 - The electrical characteristics of ZrO2 were investigated relative to its use in SiGe metal-oxide-semiconductor (MOS) gate dielectric applications. Compared to ZrO2 directly deposited on SiGe, ZrO2, when deposited on a silicon capping layer shows a significant improvement in electrical characteristics such as low leakage current, negligible hysteresis, less fixed charge density and a lower interface state density (Dit) after low-temperature wet vapor annealing. The improvement in the electrical characteristics of ZrO2, with a silicon capping layer can be attributed to the negligible Ge segregation and surface roughness at the interface. Based on an Auger electron spectroscopy (AES) depth profile of Ge, we were able to confirm that Ge is segregated at the interface.

AB - The electrical characteristics of ZrO2 were investigated relative to its use in SiGe metal-oxide-semiconductor (MOS) gate dielectric applications. Compared to ZrO2 directly deposited on SiGe, ZrO2, when deposited on a silicon capping layer shows a significant improvement in electrical characteristics such as low leakage current, negligible hysteresis, less fixed charge density and a lower interface state density (Dit) after low-temperature wet vapor annealing. The improvement in the electrical characteristics of ZrO2, with a silicon capping layer can be attributed to the negligible Ge segregation and surface roughness at the interface. Based on an Auger electron spectroscopy (AES) depth profile of Ge, we were able to confirm that Ge is segregated at the interface.

KW - Ge segregation

KW - SiGe

KW - Silicon capping layer

KW - Wet vapor annealing

KW - ZrO

UR - https://www.scopus.com/pages/publications/0036697965

U2 - 10.1143/jjap.41.5129

DO - 10.1143/jjap.41.5129

M3 - Journal article

AN - SCOPUS:0036697965

SN - 0021-4922

VL - 41

SP - 5129

EP - 5130

JO - Japanese Journal of Applied Physics

JF - Japanese Journal of Applied Physics

IS - 8

ER -

Electrical characteristics of ZrO₂ gate dielectric deposited on ultrathin silicon capping layer for SiGe metal-oxide-semiconductor device applications

Abstract

Keywords

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