Electrical variable capacitor using symmetrical switch configuration for reducing switch voltage in RF plasma systems

This paper introduces a novel method to reduce the voltage stress experienced by 320 V/1 kW/13.56 MHz electrical variable capacitor (EVC) circuits with an asymmetrical switch configuration applied in the impedance matching circuits of RF plasma systems. The proposed method employs a symmetrical switch configuration in place of the asymmetrical switch configuration in each of the capacitor legs in an EVC circuit. The symmetrical switch configuration reduces the voltage stress in the EVC circuit due to symmetrical charging and discharging modes. As a result, the proposed circuit can be used in etching systems. The major idea is verified by simulation and experimental results, which successfully demonstrate that the voltage stress on the switch of an EVC circuit is reduced by more than 35%.