Er and Pt gate electrodes formed on SiO2 gate dielectrics

We investigated the electrical and structural properties of WEr SiO2 and Pt SiO2 gate stacks. WEr SiO2 gate stacks exhibited increased capacitance after rapid thermal annealing (RTA) process while the capacitance of Pt SiO2 gate stacks remained unchangeable regardless of RTA process. Because of the physical plasma damage that occurred during the sputtering deposition process, Pt penetration led to a decrease in the SiO2 film thickness of Pt SiO2 gate stacks. This resulted in the reduction of the equivalent oxide thickness compared to the poly-Si SiO2 gate stack. A relatively small flatband voltage shift of WEr SiO2 gate stacks was attributed to the reduction of effective oxide charge caused by interfacial reaction between Er and SiO2 films.