Error bound reduction for fixed-width modified booth multiplier

Kyung Ju Cho; Seong Min Lee; Seong Hun Park; Jin Gyun Chung

doi:10.1109/ACSSC.2004.1399184

Error bound reduction for fixed-width modified booth multiplier

Kyung Ju Cho^*
, Seong Min Lee
, Seong Hun Park
, Jin Gyun Chung

^*Corresponding author for this work

Division of Electronic Engineering

Jeonbuk National University

Research output: Contribution to journal › Conference article › peer-review

3 Scopus citations

Abstract

The maximum error has serious effect on the performance of fixed-width multipliers that receive W-bit inputs and produce W-bit products. In this paper, we analyze the error bound of fixed-width modified Booth multiplier. Then, we present a method that can be used to reduce the maximum error. By simulations, it is shown that the performance of the proposed fixed-width multiplier is pretty close to that of the multiplier with rounding scheme.

Original language	English
Pages (from-to)	508-512
Number of pages	5
Journal	Conference Record of the Asilomar Conference on Signals, Systems and Computers
Volume	1
DOIs	https://doi.org/10.1109/ACSSC.2004.1399184
State	Published - 2004
Event	Conference Record of the Thirty-Eighth Asilomar Conference on Signals, Systems and Computers - Pacific Grove, CA, United States Duration: 2004.11.7 → 2004.11.10

Quacquarelli Symonds(QS) Subject Topics

Computer Science & Information Systems
Data Science

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10.1109/ACSSC.2004.1399184

Cite this

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title = "Error bound reduction for fixed-width modified booth multiplier",

abstract = "The maximum error has serious effect on the performance of fixed-width multipliers that receive W-bit inputs and produce W-bit products. In this paper, we analyze the error bound of fixed-width modified Booth multiplier. Then, we present a method that can be used to reduce the maximum error. By simulations, it is shown that the performance of the proposed fixed-width multiplier is pretty close to that of the multiplier with rounding scheme.",

author = "Cho, \{Kyung Ju\} and Lee, \{Seong Min\} and Park, \{Seong Hun\} and Chung, \{Jin Gyun\}",

year = "2004",

doi = "10.1109/ACSSC.2004.1399184",

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AU - Cho, Kyung Ju

AU - Lee, Seong Min

AU - Park, Seong Hun

AU - Chung, Jin Gyun

PY - 2004

Y1 - 2004

N2 - The maximum error has serious effect on the performance of fixed-width multipliers that receive W-bit inputs and produce W-bit products. In this paper, we analyze the error bound of fixed-width modified Booth multiplier. Then, we present a method that can be used to reduce the maximum error. By simulations, it is shown that the performance of the proposed fixed-width multiplier is pretty close to that of the multiplier with rounding scheme.

AB - The maximum error has serious effect on the performance of fixed-width multipliers that receive W-bit inputs and produce W-bit products. In this paper, we analyze the error bound of fixed-width modified Booth multiplier. Then, we present a method that can be used to reduce the maximum error. By simulations, it is shown that the performance of the proposed fixed-width multiplier is pretty close to that of the multiplier with rounding scheme.

UR - https://www.scopus.com/pages/publications/21644483222

U2 - 10.1109/ACSSC.2004.1399184

DO - 10.1109/ACSSC.2004.1399184

M3 - Conference article

AN - SCOPUS:21644483222

SN - 1058-6393

VL - 1

SP - 508

EP - 512

JO - Conference Record of the Asilomar Conference on Signals, Systems and Computers

JF - Conference Record of the Asilomar Conference on Signals, Systems and Computers

T2 - Conference Record of the Thirty-Eighth Asilomar Conference on Signals, Systems and Computers

Y2 - 7 November 2004 through 10 November 2004

ER -

Error bound reduction for fixed-width modified booth multiplier

Abstract

Quacquarelli Symonds(QS) Subject Topics

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