@inproceedings{d6f961d74805413c9f2847699dbca042,
title = "Low-complexity filter and interpolator design for ATSC DTV systems",
abstract = "This paper presents the low complexity partially folded architecture of a transposed FIR filter and cubic B-spline interpolator for ATSC terrestrial broadcasting systems. By using the multiplexer, the proposed FIR filter and interpolator can provide high clock frequency and low hardware complexity. A binary representation method was used for designing the high order FIR filter. Also, in order to compensate the truncation error of FIR filter outputs, a fixed-point range detection method was used. The proposed partially folded architecture was designed and implemented with 90-nm CMOS technology that had a supply voltage of 1.1V. The implementation results show that the proposed architectures have 12\% and 16\% less hardware complexity than the other kinds of architecture. Also, both the filter and the interpolator operate at a clock frequency of 200MHz and 385MHz, respectively.",
keywords = "Component, Digital signal processing(DSP), Digital TV(DTV), FIR filter, Interpolation",
author = "Kim, \{Yong Kyu\} and Choi, \{Chang Scok\} and Hanho Lee and Chung, \{Jin Gyun\}",
year = "2011",
doi = "10.1109/isocc.2011.6138624",
language = "English",
isbn = "9781457707100",
series = "2011 International SoC Design Conference, ISOCC 2011",
publisher = "IEEE Computer Society",
pages = "432--435",
booktitle = "2011 International SoC Design Conference, ISOCC 2011",
note = "8th International SoC Design Conference 2011, ISOCC 2011 ; Conference date: 17-11-2011 Through 18-11-2011",
}