Low-error fixed-width squarer design

  • K. J. Cho*
  • , E. M. Choi
  • , J. G. Chung
  • , M. S. Lim
  • , J. W. Kim
  • *Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

Abstract

This paper presents a design method for fixed-width squarer that receives a W-bit input and produces a W-bit squared product. To efficiently compensate for the quantization error, Booth encoder outputs (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups depending upon their effects on quantization error. Then, different error compensation methods are applied to each group. By simulation, it is shown that the performance of the proposed method is pretty close to that of the rounding operation and much better than that of the truncation operation.

Original languageEnglish
Pages (from-to)V137-V140
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume5
StatePublished - 2003
EventProceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand
Duration: 2003.05.252003.05.28

Quacquarelli Symonds(QS) Subject Topics

  • Engineering - Electrical & Electronic
  • Engineering - Petroleum

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