Low-voltage bendable pentacene thin-film transistor with stainless steel substrate and polystyrene-coated hafnium silicate dielectric

The hafnium silicate and aluminum oxide high-k dielectrics were deposited on stainless steel substrate using atomic layer deposition process and octadecyltrichlorosilane (OTS) and polystyrene (PS) were treated improve crystallinity of pentacene grown on them. Besides, the effects of the pentacene deposition condition on the morphologies, crystallinities and electrical properties of pentacene were characterized. Therefore, the surface treatment condition on dielectric and pentacene deposition conditions were optimized. The pentacene grown on polystyrene coated high-k dielectric at low deposition rate and temperature (0.2-0.3 Å/s and R.T.) showed the largest grain size (0.8-1.0 μm) and highest crystallinity among pentacenes deposited various deposition conditions, and the pentacene TFT with polystyrene coated high-k dielectric showed excellent device-performance. To decrease threshold voltage of pentacene TFT, the polystyrene-thickness on high-k dielectric was controlled using different concentration of polystyrene solution. As the polystyrene-thickness on hafnium silicate decreases, the dielectric constant of polystyrene/hafnium silicate increases, while the crystallinity of pentacene grown on polystyrene/hafnium silicate did not change. Using low-thickness polystyrene coated hafnium silicate dielectric, the high-performance and low voltage operating (<5 V) pentacene thin film transistor (μ: ∼2 cm ²/(V s), on/off ratio, >1 × 10 ⁴) and complementary inverter (DC gains, ∼20) could be fabricated.