Memory characteristics of a self-assembled monolayer of Pt nanoparticles as a charge trapping layer

A self-assembled monolayer of Pt nanoparticles (NPs) was studied as a charge trapping layer for non-volatile memory (NVM) applications. Pt NPs with a narrow size distribution (diameter ∼4 nm) were synthesized via an alcohol reduction method. The monolayer of these Pt NPs was immobilized on a SiO ₂ substrate using poly(4-vinylpyridine) (P4VP) as a surface modifier. A metal-oxide-semiconductor (MOS) type memory device with Pt NPs exhibits a relatively large memory window of 5.8 V under ± 7 V for program/erase voltage. These results indicate that the self-assembled Pt NPs can be utilized for NVM devices.