Abstract
We employ a level set-based geometry tracking software using a "grain continuum" representation, together with models for selected IC manufacturing processes and for microstructural evolution to study the development of grain structures. We consider electroless deposition, physical vapor deposition and grain boundary migration during curvature-driven ripening. We use an "encapsulation technique" to convert atomistic data; e.g., from Monte Carlo simulations of nucleation, to continua for input to deposition studies.
| Original language | English |
|---|---|
| Title of host publication | SISPAD 2003 - 2003 IEEE International Conference on Simulation of Semiconductor Processes and Devices |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 19-22 |
| Number of pages | 4 |
| ISBN (Electronic) | 0780378261 |
| DOIs | |
| State | Published - 2003 |
| Event | 2003 IEEE International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2003 - Boston, United States Duration: 2003.09.3 → 2003.09.5 |
Publication series
| Name | International Conference on Simulation of Semiconductor Processes and Devices, SISPAD |
|---|---|
| Volume | 2003-January |
Conference
| Conference | 2003 IEEE International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2003 |
|---|---|
| Country/Territory | United States |
| City | Boston |
| Period | 03.09.3 → 03.09.5 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 9 Industry, Innovation, and Infrastructure
Keywords
- Computational modeling
- Encapsulation
- Geometry
- Grain boundaries
- Integrated circuit modeling
- Microstructure
- Partial differential equations
- Plasma simulation
- Solid modeling
- Surface topography
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