Modeling and extraction technique for parasitic resistances in MOSFETs Combining DC I-V and low frequency C-V measurement

Accurate extraction of parasitic gate (R _G), source (R _S), drain (R _D), and substrate (R _sub) resistances in MOSFETs is important in the modeling and characterization for DC and RF applications. Combining DC current-voltage and low-frequency capacitance-voltage characteristics with an equivalent circuit, we report a simple technique for a complete and separate extraction of parasitic resistances (R _G, R _S, R _D, and R _sub) in individual MOSFETs without employing multiple devices or complicated S-parameter characterization with various device combinations. Intrinsic spreading component is also separated from the contact-related extrinsic component in R _S and R _D.