Power divider with tunable positive and negative group delays using parasitic compensated PIN diode

Research output: Contribution to conferenceConference paperpeer-review

Abstract

This paper presents a design of power divider with tunable positive and negative group delays. The positive group delay can be obtained between paths 2 and 1 whereas negative group delay (NGD) between paths 3 and 1. The NGD is controlled by varying bias voltage of parasitic compensated PIN diodes. For experimental verification, power divider was designed and fabricated at center frequency of 2.14 GHz. Measurement results had a good agreement with simulation results.

Original languageEnglish
Title of host publicationRWS 2016 - Proceedings of the 2016 IEEE Radio and Wireless Symposium
PublisherIEEE Computer Society
Pages4-6
Number of pages3
ISBN (Electronic)9781467398053
DOIs
StatePublished - 2016.03.30
EventIEEE Radio and Wireless Symposium, RWS 2016 - Austin, United States
Duration: 2016.01.242016.01.27

Publication series

NameIEEE Radio and Wireless Symposium, RWS
Volume2016-March
ISSN (Print)2164-2958
ISSN (Electronic)2164-2974

Conference

ConferenceIEEE Radio and Wireless Symposium, RWS 2016
Country/TerritoryUnited States
CityAustin
Period16.01.2416.01.27

Keywords

  • Branch line
  • negative group delay
  • PIN diode
  • transmission line

Quacquarelli Symonds(QS) Subject Topics

  • Computer Science & Information Systems
  • Engineering - Electrical & Electronic
  • Communication & Media Studies
  • Engineering - Petroleum
  • Data Science

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