Pre-silicidation annealing effect on platinum-silicided Schottky barrier MOSFETs

We fabricated platinum-silicided p-type Schottky barrier MOSFETs (SB-MOSFETs) with 40 nm gate length on a silicon-on-insulator wafer. In order to improve the device performance, the devices were annealed at a temperature of 900 °C in a nitrogen environment prior to the platinum deposition for source/drain silicide formation. As a result, lowered threshold voltage of 1.2 V, subthreshold swing values of 110 mV and an enhanced on/off current ratio larger than 10⁷ were obtained. This improvement is attributed to the reduction of the fixed oxide charge in the gate oxide during the annealing process.