Propagation delay matched CMOS 0.18 μm frequency doubler for L-Band application

In this article, propagation delay matched CMOS frequency doubler for L-band application is proposed. Schmitt trigger and voltage controlled delay line compensates duty cycle error and propagation delay mismatching that are induced as the frequency of operation is increased. As a consequence, unwanted harmonic components suppression is greatly improved for higher frequency of operation. CMOS frequency doubler is designed at the input fundamental frequency (f ₀) of 1.15 GHz and fabricated with TSMC 0.18 μm CMOS process. Measured output power at the doubled frequency (2f ₀) is 2.67 dBm for the input power of 0 dBm. The amount of harmonic suppression for f ₀, 3f ₀, and 4f ₀ are 43.65, 38.65, and 35.59 dB, respectively.