Abstract
The separate extraction of asymmetric source (RS) and drain (RRD) resistances caused by the variations in the layout, process, and device degradation is important in the practical modeling and characterization of MOSFETs and their integrated circuits. We propose a simple parasitic junction current method (PJCM) for the separate extraction of R S, RD, and RSUB (substrate resistance) in MOSFETs. We applied the proposed PJCM to n-channel MOSFETs with different W/L combinations and verified its usefulness in the robust extraction of R S, RD, and RSUB.
| Original language | English |
|---|---|
| Article number | 5582196 |
| Pages (from-to) | 1190-1192 |
| Number of pages | 3 |
| Journal | IEEE Electron Device Letters |
| Volume | 31 |
| Issue number | 11 |
| DOIs | |
| State | Published - 2010.11 |
Keywords
- Drain resistance
- MOSFET
- parameter extraction
- parasitic junction
- parasitic resistance
- source resistance
- substrate resistance
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