Simulation environment configuration for parallel simulation of multicore embedded systems

Increasing complexity of multicore embedded systems makes careful construction of virtual prototyping system crucial to shorten design turnaround time due to the growing demand of simulation time. Parallel simulation aims to accelerate the simulation speed by running component simulators concurrently. But extra overhead of communication and synchronization between simulators may overshadow the benefits of parallel simulation. In this paper we propose a technique to configure the simulation environment optimally considering the application characteristics. Particularly, we focus on three design axes, simulation platform selection, mapping of component simulators to participating host processors and period of null message transfer for time synchronization. As a result, the proposed technique enables the efficient exploitation of parallelism by 1) well-balanced distribution of simulation workloads to host processors and 2) the minimized overhead for null message transfer, in turn, leading to the maximal simulation performance. The experimental results show that the proposed technique robustly found the optimal configurations for wide variance of application characteristics and simulation platform.