Abstract
In this study, we analyzed the interface trap density (Dit) of 5-stage silicon-nanowires (Si-NWs) gate-all-around (GAA) field-effect-transistors (FETs) using polychromatic photonic current-voltage technique in a single device. We modeled photoresponsive differential body factor as a function of gate voltage (VGS) and extracted donor-like Dit (Dit_D) derived from the difference in the photoresponsive differential body factors. In contrast, acceptor-like Dit (Dit_A) was extracted at the dark state. Dit_D and Dit_A are extracted under two different VGS regions: Dit_A for between the flat band voltage (VFB) and the threshold voltage (VT), and Dit_D for between Von and VFB. Accordingly, positive-bias-stress (PBS) was applied to analyze the change in Dit before and after PBS.
| Original language | English |
|---|---|
| Journal | IEEE Electron Device Letters |
| DOIs | |
| State | Accepted/In press - 2026 |
Keywords
- Energy levels
- interface trap density
- photoresponsivity
- vertically-stacked gate-all-around (GAA) field effect transistors (FETs)
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