Stress Effect Analysis for PD SO! pMOSFETs with Undop ed-Si088Ge012 Heterostructure Channel

  • Sang Sik Chi
  • , A. Ram Choi
  • , Jae Yeon Kim
  • , Jeon Wook Yang
  • , Yong Woo Hwang
  • , Tae Hyun Han
  • , Deok Ho Cho
  • , Kyu Hwan Shim*
  • *Corresponding author for this work

Research output: Contribution to journalJournal articlepeer-review

Abstract

The stress effect of SiGe p-type metal oxide semiconductor field effect transistors (MOSFETs) has been investigated to compare their properties associated with the Si0.88Ge0.12/Si epi channels grown on the Si bulk and partially depleted silicon on insulator (PD SOT) substrates. The stress-induced changes in the subthreshold slope and the drain induced barrier lowering were observed small in the SiGe PD SOI in comparison to in the SiGe bulk. Likewise the threshold voltage shift monitored as a function of hot carrier stress time presented excellent stability than in the SiGe PD SOl. Therefore, simply in terms of dc properties, the SlOe PD SOl looks more immune from electrical stresses than the SiGe bulk. However, the I/f noise properties revealed that the hot carrier stress could introduce lots of generation-recombination noise sources in the SiGe PD SOT. The quality control of oxide-silicon in SOl structures is essential to minimize a possible surge of 1/f noise level due to the hot carrier injection. In order to improve dc and rf performance simultaneously, it is very important to grow the SiGe channels on high quality SOT substrates.

Original languageEnglish
Pages (from-to)716-720
Number of pages5
JournalIEICE Transactions on Electronics
VolumeE91-C
Issue number5
DOIs
StatePublished - 2008.05

Keywords

  • MOSFET PD 501
  • S/Ge
  • Stress effect

Quacquarelli Symonds(QS) Subject Topics

  • Materials Science
  • Engineering - Electrical & Electronic
  • Engineering - Petroleum

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