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Sub-ns polarization switching in 25nm FE FinFET toward post CPU and spatial-energetic mapping of traps for enhanced endurance

  • Hagyoul Bae
  • , Seung Geol Nam
  • , Taehwan Moon
  • , Yunseong Lee
  • , Sanghyun Jo
  • , Duk Hyun Choe
  • , Sangwook Kim
  • , Kwang Hee Lee
  • , Jinseong Heo*
  • *Corresponding author for this work
  • Samsung

Research output: Contribution to conferenceConference paperpeer-review

Abstract

In this work, we report sub-ns polarization switching in highly scaled 25 nm ferroelectric (FE) FinFET with Hf0.5Zr0.5O2 (HZO) ferroelectric (FE)/SiO2 dielectric (DE) gate stack for high performance CPU application for the first time. Observed limited endurance was attributed to the increase of trap density in the stack, which was quantitatively analyzed upon program/erase cycles by various methods including newly adopted low-frequency noise (LFN) characteristics for resolving spatial and energetic distribution of traps. In particular, we identified three different types of traps at FE/DE interface (Dit_2) and SiO2/Si channel interface (Dit_1) as well as in the bulk oxide (Not) of the HZO/SiO2 gate stack of FE FinFETs. In addition, with the developed trap analysis, we investigated radiation-induced degradation of HZO/SiO2 gate stack for application under harsh environments. Highly scaled and high performance FE FinFETs with enhanced endurance would provide a viable solution for future platform of low-power computing.

Original languageEnglish
Title of host publication2020 IEEE International Electron Devices Meeting, IEDM 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages31.3.1-31.3.4
ISBN (Electronic)9781728188881
DOIs
StatePublished - 2020.12.12
Event66th Annual IEEE International Electron Devices Meeting, IEDM 2020 - Virtual, San Francisco, United States
Duration: 2020.12.122020.12.18

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
Volume2020-December
ISSN (Print)0163-1918

Conference

Conference66th Annual IEEE International Electron Devices Meeting, IEDM 2020
Country/TerritoryUnited States
CityVirtual, San Francisco
Period20.12.1220.12.18

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