Synthesis of Reflection-Type Coupled Line All-Pass Circuit with Arbitrary Prescribed Wideband Flat Group Delay

Girdhari Chaudhary; Yongchae Jeong

doi:10.1109/LMWC.2017.2747149

Synthesis of Reflection-Type Coupled Line All-Pass Circuit with Arbitrary Prescribed Wideband Flat Group Delay

Girdhari Chaudhary
, Yongchae Jeong^*

^*Corresponding author for this work

Division of Electronic Engineering

Jeonbuk National University

Research output: Contribution to journal › Journal article › peer-review

6 Scopus citations

Abstract

In this letter, the analytical design method of a reflection-type coupled line all-pass circuit with arbitrary predefined wideband flat group delay (GD) is presented. The proposed circuit consists of 90° hybrid and coupled lines with a short-circuited load. The proposed structure is simple and does not require any iterative process to obtain optimum circuit parameters. Theoretical and experimental results are provided for validation of the proposed structure. The prototype circuits were fabricated at a center frequency of 2.5 GHz with 2 and 4 ns flat GD responses. The measurement results agreed well with the simulation and theoretical predicted results.

Original language	English
Article number	8038857
Pages (from-to)	876-878
Number of pages	3
Journal	IEEE Microwave and Wireless Components Letters
Volume	27
Issue number	10
DOIs	https://doi.org/10.1109/LMWC.2017.2747149
State	Published - 2017.10

Keywords

Cancelation circuit
coupled line
real-time analog signal processing
wideband flat group delay (GD) response

Quacquarelli Symonds(QS) Subject Topics

Engineering - Electrical & Electronic
Engineering - Petroleum
Physics & Astronomy

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10.1109/LMWC.2017.2747149

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@article{a9c0c0dcc01e40f3a67653ae7e74f96f,

title = "Synthesis of Reflection-Type Coupled Line All-Pass Circuit with Arbitrary Prescribed Wideband Flat Group Delay",

abstract = "In this letter, the analytical design method of a reflection-type coupled line all-pass circuit with arbitrary predefined wideband flat group delay (GD) is presented. The proposed circuit consists of 90° hybrid and coupled lines with a short-circuited load. The proposed structure is simple and does not require any iterative process to obtain optimum circuit parameters. Theoretical and experimental results are provided for validation of the proposed structure. The prototype circuits were fabricated at a center frequency of 2.5 GHz with 2 and 4 ns flat GD responses. The measurement results agreed well with the simulation and theoretical predicted results.",

keywords = "Cancelation circuit, coupled line, real-time analog signal processing, wideband flat group delay (GD) response",

author = "Girdhari Chaudhary and Yongchae Jeong",

note = "Publisher Copyright: {\textcopyright} 2001-2012 IEEE.",

year = "2017",

month = oct,

doi = "10.1109/LMWC.2017.2747149",

language = "English",

volume = "27",

pages = "876--878",

journal = "IEEE Microwave and Wireless Components Letters",

issn = "1531-1309",

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}

TY - JOUR

T1 - Synthesis of Reflection-Type Coupled Line All-Pass Circuit with Arbitrary Prescribed Wideband Flat Group Delay

AU - Chaudhary, Girdhari

AU - Jeong, Yongchae

PY - 2017/10

Y1 - 2017/10

N2 - In this letter, the analytical design method of a reflection-type coupled line all-pass circuit with arbitrary predefined wideband flat group delay (GD) is presented. The proposed circuit consists of 90° hybrid and coupled lines with a short-circuited load. The proposed structure is simple and does not require any iterative process to obtain optimum circuit parameters. Theoretical and experimental results are provided for validation of the proposed structure. The prototype circuits were fabricated at a center frequency of 2.5 GHz with 2 and 4 ns flat GD responses. The measurement results agreed well with the simulation and theoretical predicted results.

AB - In this letter, the analytical design method of a reflection-type coupled line all-pass circuit with arbitrary predefined wideband flat group delay (GD) is presented. The proposed circuit consists of 90° hybrid and coupled lines with a short-circuited load. The proposed structure is simple and does not require any iterative process to obtain optimum circuit parameters. Theoretical and experimental results are provided for validation of the proposed structure. The prototype circuits were fabricated at a center frequency of 2.5 GHz with 2 and 4 ns flat GD responses. The measurement results agreed well with the simulation and theoretical predicted results.

KW - Cancelation circuit

KW - coupled line

KW - real-time analog signal processing

KW - wideband flat group delay (GD) response

UR - https://www.scopus.com/pages/publications/85030638262

U2 - 10.1109/LMWC.2017.2747149

DO - 10.1109/LMWC.2017.2747149

M3 - Journal article

AN - SCOPUS:85030638262

SN - 1531-1309

VL - 27

SP - 876

EP - 878

JO - IEEE Microwave and Wireless Components Letters

JF - IEEE Microwave and Wireless Components Letters

IS - 10

M1 - 8038857

ER -

Synthesis of Reflection-Type Coupled Line All-Pass Circuit with Arbitrary Prescribed Wideband Flat Group Delay

Abstract

Keywords

Quacquarelli Symonds(QS) Subject Topics

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