@inproceedings{97849d6cd26f40229ca328a8804e2bc4,
title = "Wideband multi-bit third-order sigma-delta ADC for wireless transceivers",
abstract = "This paper presents a multi-bit sigma-delta data converter with third-order 3-bit topology. This converter can achieve high resolution with a lower order modulator and tower oversampling ratio than single-bit converter. The dynamic element matching (DEM) algorithm is designed in such a way as to minimize delay within the feedback loop of the sigma-delta ADC. The behavioral model is used to simulate the designed sigma-delta data converter. The designed ADC achieves 14-bit resolution, a peak SNR of 87dB within a 1 MHz signal baseband at a clock rate of 50MHz.",
author = "Kim, \{Sun Hong\} and Lee, \{Ho Yeon\} and Choi, \{Seok Woo\} and Kim, \{Dong Yong\}",
note = "Publisher Copyright: {\textcopyright} 2003 IEEE.; 5th International Conference on ASIC, ASICON 2003 ; Conference date: 21-10-2003 Through 24-10-2003",
year = "2003",
doi = "10.1109/ICASIC.2003.1277642",
language = "English",
series = "IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "689--692",
editor = "Ting-Ao Tang and Wenhong Li and Huihua Yu",
booktitle = "ASICON 2003 - 2003 5th International Conference on ASIC, Proceedings",
}